LCMXO3L-SMA-EVN
Daughter Board, MachXO3L Breakout Board, XO3L-2100 MIPI D-PHY Tx & Rx Interface
| Manufacturer | LATTICE SEMICONDUCTOR |
|---|---|
| Manufacturer Part No | LCMXO3L-SMA-EVNCopy |
| Manufacturer Standard Lead Time | 6 weeks |
| Order Code | 2448482 |
| Your Part Number |
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| Quantity | Price (inc GST) |
|---|---|
| 1+ | S$431.800 (S$470.662) |
Product Information
| Manufacturer | LATTICE SEMICONDUCTOR |
|---|---|
| Manufacturer Part No | LCMXO3L-SMA-EVNCopy |
| Manufacturer Standard Lead Time | 6 weeks |
| Order Code | 2448482 |
| Silicon Manufacturer | Lattice Semiconductor |
| Core Architecture | FPGA |
| Core Sub-Architecture | - |
| Silicon Core Number | XO3L-6900 |
| Silicon Family Name | MachXO3 |
| For Use With | Lattice Low Density MachXO3L FPGAs |
| Kit Contents | Breakout Board XO3L-6900, USB Cable, Quick Start Guide |
| Product Range | - |
| SVHC | No SVHC (25-Jun-2025) |
Product Overview
The LCMXO3L-SMA-EVN is a Breakout Board Evaluation Kit for providing an environment to evaluate high speed source synchronous interfaces with the Lattice MachXO3L-2100 and MachXO3L-6900 products in both 49-ball WLCSP and 256-ball caBGA packages respectively. The board contains two sections for development. The first section of the board features the MachXO3L-2100 which is optimized for MIPI D-PHY receiver and MIPI D-PHY transmitter interfaces with up to four data lanes and one clock lane each. The second section of the board features the MachXO3L-6900. This section provides a flexible IO evaluation environment for MIPI D-PHY, SubLVDS, FPD-LINK, FPC-LINK as well as other source synchronous type protocols. The IO of the MachXO3L-6900 provides eight high speed data and two high speed clock interfaces in both transmit and receive directions. Connection to these interfaces is available through SMAs for signal integrity and performance evaluation.
Applications
Test & Measurement, Industrial
Contents
Board, Pre-loaded demo, Mini USB cable, QuickStart guide.
Technical Specifications
| Silicon Manufacturer | Lattice Semiconductor |
|---|---|
| Core Sub-Architecture | - |
| Silicon Family Name | MachXO3 |
| Kit Contents | Breakout Board XO3L-6900, USB Cable, Quick Start Guide |
| SVHC | No SVHC (25-Jun-2025) |
| Core Architecture | FPGA |
|---|---|
| Silicon Core Number | XO3L-6900 |
| For Use With | Lattice Low Density MachXO3L FPGAs |
| Product Range | - |
Technical Docs (1)
Legislation and Environmental
| Country of Origin: Country in which last significant manufacturing process was carried outCountry of Origin: | United States Country in which last significant manufacturing process was carried out |
|---|---|
| Tariff No: | 84733080 |
| US ECCN: | EAR99 |
| EU ECCN: | NLR |
| RoHS Compliant: | Yes RoHS |
| RoHS Phthalates Compliant: | Yes RoHS |
| SVHC: | No SVHC (25-Jun-2025) |
| Download Product Compliance Certificate | Product Compliance Certificate |
| Weight (kg): | .12 |