M95P32-IXMGT/E

M95P32-IXMGT/E is a SPI serial access EEPROM. It offers byte flexibility, page alterability, high page cycling performance, and ultra-low power consumption, equivalent to that of EEPROM technology. It offers byte and page write instructions of up to 512 bytes. Write instructions consist of self-timed auto-erase and program operations, resulting in flexible data byte management. This device also accepts page/block/sector/chip erase commands to set the memory to an erased state. The memory can then be fast-programmed by 512-byte pages, and further optimized using the Page program with buffer load instruction to hide the SPI communication latency.

• 32Mbit, VCC voltage range from 1.6V to 3.6V
• ECC for high memory reliability (DEC,TED), schmitt trigger inputs for noise filtering
• Output buffer programmable strength, operating status flags for ISO26262
• Software reset, electronic identification, JEDEC standard manufacturer identification
• HBM (human body model) is 2000V, input rise/fall time is 5ns maximum
• Input capacitance is 6pF maximum, standby supply current is 16µA typical
• Input leakage current is ±2µA maximum at (VIN = VSS or VCC)
• Clock frequency is 40MHz maximum at (1.6V ≤ VCC ≤ 2.6V)
• Standby supply current is 16µA typ at (S = VCC; TA = 25°C, VIN = VSS or VCC; 1.6V ≤ VCC ≤ 3.6V)
• Industrial temperature range from -40°C to 85°C, DFN8 package